{"id":46990,"date":"2026-10-27T15:22:00","date_gmt":"2026-10-27T07:22:00","guid":{"rendered":"https:\/\/rjydisplay.com\/?p=46990"},"modified":"2026-11-04T09:57:36","modified_gmt":"2026-11-04T09:57:36","slug":"double-layer-pcb-manufacturing","status":"publish","type":"post","link":"https:\/\/rjydisplay.com\/ru\/double-layer-pcb-manufacturing\/","title":{"rendered":"\u041f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0441\u0442\u0432\u043e \u0434\u0432\u0443\u0445\u0441\u043b\u043e\u0439\u043d\u044b\u0445 \u043f\u0435\u0447\u0430\u0442\u043d\u044b\u0445 \u043f\u043b\u0430\u0442: \u0440\u0443\u043a\u043e\u0432\u043e\u0434\u0441\u0442\u0432\u043e \u043f\u043e \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u0443, \u043f\u0440\u043e\u0435\u043a\u0442\u0438\u0440\u043e\u0432\u0430\u043d\u0438\u044e \u0438 \u043a\u043e\u043d\u0442\u0440\u043e\u043b\u044e"},"content":{"rendered":"<p><strong>Double layer PCB manufacturing<\/strong> turns a copper-clad insulating core into a board with conductive patterns on both faces. In a common plated-through-hole process, the fabricator drills the panel, makes selected hole walls conductive, images the circuit, plates and etches copper, applies solder mask and surface finish, then profiles and tests the bare boards.<\/p>\n<p>A two-layer board is not automatically suitable for every display controller. Its copper geometry, return-current paths, power, connectors, manufacturing tolerances and test requirements must fit the actual design. This guide follows a representative rigid-board process and explains what an OEM or electronics engineer should establish before ordering.<\/p>\n<h2>What is a double layer PCB?<\/h2>\n<p>A double layer or double-sided PCB has two patterned copper conductor layers, normally one on each face of an insulating core. The solder mask and printed legend are additional materials but are not counted as copper circuit layers. FR-4 is one common family of rigid laminate; the exact grade and finished construction should be specified for the application.<\/p>\n<p>Conductors on opposite sides can be connected by plated-through holes (PTHs), including vias and component holes, when the design calls for them. A double-sided board can also contain non-plated holes for mounting or other purposes. Having two copper faces does not mean every hole is plated or every overlapping pad is electrically connected.<sup><a href=\"#ref-1\">[1]<\/a><\/sup><\/p>\n<p>A bare PCB provides the physical interconnections. A printed circuit board assembly (PCBA) is the board after components have been mounted and soldered. Fabrication, assembly and functional testing have related but distinct data and acceptance requirements.<\/p>\n<h2>How is a two-layer PCB manufactured?<\/h2>\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1536\" height=\"1024\" src=\"https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-02-drilling.png\" class=\"wp-image-46987\" alt=\"A drill spindle above a copper-clad production panel\" title=\"\" srcset=\"https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-02-drilling.png 1536w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-02-drilling-300x200.png 300w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-02-drilling-1024x683.png 1024w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-02-drilling-768x512.png 768w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-02-drilling-18x12.png 18w\" sizes=\"auto, (max-width: 1536px) 100vw, 1536px\" \/><figcaption>Conceptual PCB drilling; actual equipment and process vary by supplier.<\/figcaption><\/figure>\n<p>The sequence below is a representative <strong>pattern-plated, subtractive process<\/strong> for a rigid PTH board. A fabricator can use another sequence, chemistry or imaging method. Confirm the actual process and capability with the selected supplier; the flow is not a claim about RJY&#8217;s own factory processes.<sup><a href=\"#ref-2\">[2]<\/a><\/sup><sup><a href=\"#ref-3\">[3]<\/a><\/sup><\/p>\n<table><thead><tr><th>Stage<\/th><th>Purpose<\/th><th>Critical output<\/th><\/tr><\/thead><tbody><tr><td>Engineering review<\/td><td>Check the design package and manufacturing notes.<\/td><td>Resolved data, layer mapping and agreed requirements.<\/td><\/tr><tr><td>Material preparation<\/td><td>Cut a double-sided copper-clad laminate into production panels.<\/td><td>Correct core, copper and workable panel size.<\/td><\/tr><tr><td>Drilling and hole preparation<\/td><td>Create holes and prepare the hole walls.<\/td><td>Correct locations and clean surfaces for subsequent processing.<\/td><\/tr><tr><td>Hole metallization and plating<\/td><td>Create conductive paths through specified holes.<\/td><td>A continuous plated connection where required.<\/td><\/tr><tr><td>Imaging, plating and etching<\/td><td>Define and form the copper circuit.<\/td><td>Traces, pads and isolated areas that match the design.<\/td><\/tr><tr><td>Mask, finish and legend<\/td><td>Protect selected copper, prepare exposed pads and add markings.<\/td><td>Openings, finish and markings consistent with the files.<\/td><\/tr><tr><td>Profile and final inspection<\/td><td>Separate boards and check the finished product.<\/td><td>Required outline, electrical results and inspection records.<\/td><\/tr><\/tbody><\/table>\n<h3>1. Review the fabrication package<\/h3>\n<p>The fabricator starts with the circuit images, drill data, board outline and fabrication drawing. The engineer checks that the files use the same origin, units and revision, and that the top and bottom copper layers align with the plated and non-plated hole information. A netlist provides a useful independent electrical reference.<\/p>\n<p>Manufacturing review also addresses material, finished thickness, copper requirements, minimum features, hole tolerances, surface finish, solder-mask openings and board profile. A missing note can become a supplier assumption. Resolve conflicting requirements before a production panel is made.<\/p>\n<h3>2. Cut and prepare the copper-clad core<\/h3>\n<p>A common rigid starting material is an insulating core clad with copper on both sides. The supplier cuts it into a panel suitable for its process and cleans the surfaces. The initial copper foil is not necessarily the same as the finished copper thickness: subsequent plating and processing can change the copper in the finished features.<\/p>\n<p>Do not specify only \u201ctwo-layer FR-4\u201d if the application has specific thermal, dielectric, mechanical or assembly constraints. Identify the relevant laminate grade, thickness and copper requirements with tolerances appropriate to the design. A fabricator should confirm what it can produce and inspect.<\/p>\n<h3>3. Drill holes and prepare the walls<\/h3>\n<p>Mechanical drilling creates the holes indicated in the drill data. Production panels use registration and tooling features so holes and artwork can be aligned. After drilling, the shop cleans and prepares the holes for the selected metallization process. The treatment and its sequence depend on the material and the manufacturer&#8217;s process.<\/p>\n<p>Finished hole size is not always the same as drill size. For a plated hole, the plating reduces the final opening; the fabricator selects the drill and process compensation to meet the agreed finished-hole tolerance. Clearly identify which holes are plated, which are non-plated, and which dimensions are finished dimensions.<\/p>\n<h3>4. Make plated holes conductive<\/h3>\n<p>The insulating hole wall cannot carry current on its own. A common method deposits a thin conductive copper layer chemically, after which electrolytic copper can build up the conductor and plated hole. Alternative direct-metallization methods also exist. The exact sequence of panel plating, imaging and pattern plating varies by shop.<sup><a href=\"#ref-2\">[2]<\/a><\/sup><sup><a href=\"#ref-4\">[4]<\/a><\/sup><\/p>\n<p>Continuity between the two sides depends on a sound hole-wall connection and contact to the intended pads. Hole size, board thickness, pad geometry, material and process capability all matter. Electrical continuity is useful evidence, but it does not by itself prove every long-term reliability requirement.<\/p>\n<h3>5. Image, plate and etch the copper pattern<\/h3>\n<p>In the representative pattern-plating route, photoresist is applied and exposed to define where copper and an etch-resistant metal will be plated. After development and plating, the resist is removed. Etching removes unwanted exposed copper; the remaining protective metal is then stripped or handled according to the selected finish route. Georgia Tech&#8217;s process description shows this example sequence.<sup><a href=\"#ref-2\">[2]<\/a><\/sup><\/p>\n<p>Other processes use different imaging and plating sequences. The result required by the design remains the same: conductive features where the netlist requires them and isolation where circuits must remain separate. Review trace width, spacing, annular ring and hole-to-copper clearance against the fabricator&#8217;s current capabilities.<\/p>\n<h3>6. Apply solder mask, surface finish and markings<\/h3>\n<p>Solder mask covers selected areas of copper and leaves intended openings for pads and other features. It can help control solder bridging during assembly, but it is not a substitute for a specified electrical insulation system. Mask registration and the size of mask openings matter around fine-pitch components.<\/p>\n<p>A surface finish protects exposed copper and supports the intended soldering or contact function. Options can include lead-free HASL, ENIG, OSP or other finishes, subject to the fabricator&#8217;s capabilities and project needs. Compare solderability, surface flatness, storage and assembly requirements rather than assuming one finish is best for every design.<\/p>\n<p>Legend or silkscreen identifies items such as reference designators and polarity marks. It is not part of the circuit connectivity. Avoid placing markings where they interfere with exposed solder pads or create ambiguity at inspection.<\/p>\n<h3>7. Profile, test and inspect<\/h3>\n<p>The manufacturer forms the outline by routing, scoring or another agreed method. Panelization features and breakaway tabs must be compatible with assembly and depanelization. The board is then inspected against the agreed drawing and acceptance requirements. A bare-board electrical test checks for specified opens and shorts; the chosen method and coverage depend on the design and test arrangement.<\/p>\n<p>Visual or automated optical inspection can identify certain defects in copper patterns or finished surfaces. Cross-sectioning and other destructive or sample-based checks can provide evidence about internal features such as plated-hole construction when required by the agreed plan. Neither visual inspection nor a continuity pass alone proves that the assembled controller will operate correctly.<\/p>\n<h2>Double layer PCB manufacturing versus PCB assembly<\/h2>\n<table><thead><tr><th>Work<\/th><th>Main input<\/th><th>Output or check<\/th><\/tr><\/thead><tbody><tr><td>Bare-board fabrication<\/td><td>Copper layers, drill files, outline, netlist and fabrication notes.<\/td><td>Unpopulated PCB with specified conductor pattern and finish.<\/td><\/tr><tr><td>Assembly<\/td><td>Bare board, bill of materials, placement data, polarity and assembly instructions.<\/td><td>Components mounted and soldered to create a PCBA.<\/td><\/tr><tr><td>Functional validation<\/td><td>Test procedure, firmware, fixtures and acceptance limits.<\/td><td>Evidence that the specified assembly performs its intended functions.<\/td><\/tr><\/tbody><\/table>\n<p>Do not assume that a bare-board order includes parts, programming or a display test. For a display controller assembly, distinguish a bare-board electrical test from checking power rails, video output, backlight behavior, touch and software on the assembled system.<\/p>\n<h2>What files are needed to manufacture a double-sided PCB?<\/h2>\n<p>A complete release package reduces avoidable questions. The exact format depends on the fabricator, but the following information is normally useful:<\/p>\n<ul><li><strong>Copper artwork:<\/strong> top and bottom layer data, with an unambiguous view convention and common origin.<\/li><li><strong>Mask and legend:<\/strong> top and bottom files and any required opening or marking notes.<\/li><li><strong>Drill data:<\/strong> locations, tool definitions, units and separate plated and non-plated identification.<\/li><li><strong>Outline and fabrication drawing:<\/strong> dimensions, thickness, tolerances, cutouts and panel requirements.<\/li><li><strong>Electrical netlist:<\/strong> the expected connectivity for comparison and test where supported.<\/li><li><strong>Fabrication notes:<\/strong> material, copper, hole requirements, surface finish, applicable acceptance criteria and documentation.<\/li><\/ul>\n<p>For assembly, add the controlled BOM, placement or centroid data, assembly drawing, polarity and orientation information, and any programming or test instructions. Specify revisions for the board and assembly separately. A Gerber set alone does not necessarily communicate every construction or acceptance requirement.<\/p>\n<h2>Design-for-manufacturing decisions that affect yield and cost<\/h2>\n<h3>Trace width, spacing and copper<\/h3>\n<p>Trace width and spacing must meet both electrical needs and the fabricator&#8217;s capability for the specified copper and process. Fine features can require tighter process control and raise cost or reduce the available supplier pool. Copper thickness affects current-carrying and thermal behavior, but a width or copper weight alone does not guarantee a temperature rise or current rating. Use an appropriate calculation method and validate the completed design.<\/p>\n<h3>Vias, annular rings and finished holes<\/h3>\n<p>Allow for drill registration and the fabricator&#8217;s required annular ring. Very small holes, thick boards and dense pad fields can constrain drilling and plating. Specify a finished-hole tolerance where a component or connector must fit, and confirm the supplier&#8217;s tooling and inspection plan. A through via connects the two copper faces only when the plated path and pads are correctly defined and manufactured.<\/p>\n<h3>Board outline, clearances and panelization<\/h3>\n<p>Keep copper, components and mounting features clear of the board edge according to the design and supplier&#8217;s process. Define the finished outline, cutouts and keepouts. If the board will be assembled in a panel, agree on rails, fiducials, tabs or scoring with both the assembler and fabricator. The final decision must also protect connectors and nearby components during depanelization.<\/p>\n<h3>Surface finish and assembly<\/h3>\n<p>Fine-pitch parts, storage duration, multiple soldering operations and connector contacts can influence finish selection. Confirm the applicable finish, handling and assembly constraints with the supplier. A finish name alone does not establish solderability after an unspecified storage period or guarantee a reliable connector interface.<\/p>\n<h2>When is a two-layer PCB a good choice?<\/h2>\n<p>Two copper layers can be a practical starting point for a relatively simple circuit when routing, grounding, power and manufacturing requirements can all be met. They offer space on both sides of the core and allow connections between faces through suitable vias. They are not inherently the least expensive or most reliable choice for every product; the full design and production volume affect the trade-off.<\/p>\n<p>A four-layer or other multilayer board can provide additional routing and reference-plane options. For higher-speed interfaces, dense connectors or multiple power domains, a two-layer layout may be more difficult to implement with a continuous return path and the required impedance. The layer count alone does not prove signal integrity: review the stackup, geometry, return currents, connector transitions and actual interface requirements.<\/p>\n<h2>What changes for an LCD controller or HMI board?<\/h2>\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1536\" height=\"1024\" src=\"https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-04-display.png\" class=\"wp-image-46989\" alt=\"Display module, flexible circuit and a separate controller board\" title=\"\" srcset=\"https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-04-display.png 1536w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-04-display-300x200.png 300w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-04-display-1024x683.png 1024w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-04-display-768x512.png 768w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-04-display-18x12.png 18w\" sizes=\"auto, (max-width: 1536px) 100vw, 1536px\" \/><figcaption>Conceptual components; verify compatibility for the actual project.<\/figcaption><\/figure>\n<p>A display-related PCBA may connect a host, LCD module, backlight and touch controller. The board&#8217;s job can range from simple power or control circuitry to a complex interface or processor-based design. Confirm the system architecture before deciding the copper-layer count.<\/p>\n<p>For any controller-board match, review the actual LCD model, resolution, interface, pin definition, timing, driver IC where available, power rails, backlight and touch requirements. Firmware, operating system and the mechanical environment are also project-dependent. Similar connectors do not guarantee electrical compatibility, and HDMI-to-MIPI conversion is not a universal passive cable.<\/p>\n<p>High-speed links such as LVDS, MIPI, HDMI or eDP may need carefully controlled impedance and return paths. Consult the relevant interface and component documentation and work with the PCB fabricator on the stackup. Do not assume that every two-layer board can meet these requirements or that every design requires the same number of layers.<\/p>\n<p>For related terminology, see <a href=\"https:\/\/rjydisplay.com\/what-is-a-pcb-board-made-of\/\">what a PCB board is made of<\/a>; that guide covers materials and structures, while this article focuses on manufacturing and release decisions.<\/p>\n<h2>How to set inspection and acceptance requirements<\/h2>\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1536\" height=\"1024\" src=\"https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-03-inspection.png\" class=\"wp-image-46988\" alt=\"Unpopulated circuit boards being examined with a magnifier\" title=\"\" srcset=\"https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-03-inspection.png 1536w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-03-inspection-300x200.png 300w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-03-inspection-1024x683.png 1024w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-03-inspection-768x512.png 768w, https:\/\/rjydisplay.com\/wp-content\/uploads\/2026\/10\/double-layer-pcb-03-inspection-18x12.png 18w\" sizes=\"auto, (max-width: 1536px) 100vw, 1536px\" \/><figcaption>Conceptual inspection scene; no inspection result is claimed.<\/figcaption><\/figure>\n<p>Agree on the applicable standard, revision, product class or equivalent acceptance criteria in the purchase documents. Do not use a standard&#8217;s name as proof that a supplier or specific board is certified. Ask what evidence will be provided for the order, such as material identification, electrical-test results, dimensional inspection, sample cross-sections or traceability, where required.<\/p>\n<p>Describe the critical features: connector holes, finished thickness, edge clearance, plated-hole quality, solder-mask openings and relevant finish. For an assembled board, add assembly inspection, programming and functional test requirements. A prototype should be evaluated with its actual connector, enclosure, power and display rather than only against a catalog description.<\/p>\n<h2>Common questions about double layer PCB manufacturing<\/h2>\n<h3>Is a double-sided PCB the same as a two-layer PCB?<\/h3>\n<p>In this context, both terms describe a board with patterned copper on two faces. Clarify whether the required interconnections are plated and how the layers are defined in the order.<\/p>\n<h3>Are all holes in a two-layer PCB plated?<\/h3>\n<p>No. A design can include plated holes for electrical connections and non-plated holes for mechanical features. Identify each type clearly in the drill data and drawing.<\/p>\n<h3>Can a two-layer PCB carry high-speed display signals?<\/h3>\n<p>It can be evaluated for a particular interface and layout, but two layers do not guarantee acceptable impedance, return paths or signal integrity. Review the complete stackup, routing and system requirements.<\/p>\n<h3>Does passing a bare-board electrical test prove the PCBA works?<\/h3>\n<p>No. Bare-board testing checks the specified electrical connectivity and isolation. Component assembly, firmware, power and system behavior require their own checks.<\/p>\n<h3>Is solder-mask color a measure of PCB quality?<\/h3>\n<p>No. Color alone does not establish material properties, registration, electrical behavior or manufacturing quality. Evaluate the specified material and inspection results.<\/p>\n<h3>What should I send for a manufacturing quote?<\/h3>\n<p>Provide the board files, drill data, outline, netlist and fabrication drawing with material, copper, finish, tolerances, quantity and inspection requirements. Add BOM and assembly data if an assembled board is needed.<\/p>\n<h2>Discuss a display-board project<\/h2>\n<p>Two-layer fabrication is a sequence of material preparation, hole formation, metallization, copper patterning, protection and verification. The useful purchasing question is whether the specified process can produce and verify the board your design requires.<\/p>\n<p>For an LCD module or controller-board integration project, share the panel model and datasheet, host interface, power and backlight needs, touch requirements, board files and intended operating environment. <a href=\"https:\/\/rjydisplay.com\/contact\/\">Contact RJY Display<\/a> for a project-specific discussion.<\/p>\n<h2>References<\/h2>\n<ol><li id=\"ref-1\"><a href=\"https:\/\/quicksearch.dla.mil\/qsDocDetails.aspx?ident_number=122528\" rel=\"nofollow noopener\" target=\"_blank\">Defense Logistics Agency, MIL-PRF-31032\/2 document details<\/a>, scope for rigid single- and double-layer printed boards with or without plated holes.<\/li><li id=\"ref-2\"><a href=\"https:\/\/eislab.gatech.edu\/projects\/proam\/resources\/pwb-fab-process\/\" rel=\"nofollow noopener\" target=\"_blank\">Georgia Tech, PWB Fabrication Process<\/a>.<\/li><li id=\"ref-3\"><a href=\"https:\/\/www.pcbway.com\/pcb_manufacturing_process_PCBWay.pdf\" rel=\"nofollow noopener\" target=\"_blank\">PCBWay, PCB Manufacturing Process<\/a>, example double-sided flow.<\/li><li id=\"ref-4\"><a href=\"https:\/\/www.unimicron-germany.com\/plating-through-and-photo-print.html\" rel=\"nofollow noopener\" target=\"_blank\">Unimicron Germany, Plating Through and Photo Print<\/a>.<\/li><\/ol>\n","protected":false},"excerpt":{"rendered":"<p>\u041f\u043e\u043d\u0438\u043c\u0430\u0442\u044c, \u043a\u0430\u043a \u0438\u0437\u0433\u043e\u0442\u0430\u0432\u043b\u0438\u0432\u0430\u044e\u0442\u0441\u044f \u0434\u0432\u0443\u0445\u0441\u043b\u043e\u0439\u043d\u044b\u0435 \u043f\u0435\u0447\u0430\u0442\u043d\u044b\u0435 \u043f\u043b\u0430\u0442\u044b, \u043a\u0430\u043a\u0438\u0435 \u0444\u0430\u0439\u043b\u044b \u0438 \u043f\u0440\u043e\u0432\u0435\u0440\u043a\u0438 \u0434\u043b\u044f \u043d\u0438\u0445 \u0442\u0440\u0435\u0431\u0443\u044e\u0442\u0441\u044f, \u0438 \u043a\u0430\u043a \u0432\u044b\u0431\u043e\u0440 \u043f\u043b\u0430\u0442\u044b \u0432\u043b\u0438\u044f\u0435\u0442 \u043d\u0430 \u043f\u0440\u043e\u0435\u043a\u0442\u044b \u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u043e\u0432 \u0434\u0438\u0441\u043f\u043b\u0435\u044f.<\/p>","protected":false},"author":2,"featured_media":46986,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[438],"tags":[],"class_list":["post-46990","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-knowledge"],"_links":{"self":[{"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/posts\/46990","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/comments?post=46990"}],"version-history":[{"count":1,"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/posts\/46990\/revisions"}],"predecessor-version":[{"id":47033,"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/posts\/46990\/revisions\/47033"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/media\/46986"}],"wp:attachment":[{"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/media?parent=46990"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/categories?post=46990"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/rjydisplay.com\/ru\/wp-json\/wp\/v2\/tags?post=46990"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}